1. Field of the Invention
The present invention relates to a communication system, a communication circuit and a communication method. In particular, the invention relates to multi-master communication system and method.
2. Description of Related Art
In recent years, attention has been given to a multi-master communication system having plural nodes that are connected to a bus and allowed to transmit data on the bus if released.
As shown in FIG. 7, in such a communication system, any number of communication nodes (1A, 1B, and 1C) are connected with a common bus, but an arbitration circuit for determining which node of the plural communication nodes uses the common bus is not provided, so the individual communication nodes independently monitor the usage of the bus to determine whether or not data can be transmitted. As an example of the multi-master communication system not having the arbitration circuit, there is a controller area network (CAN) used in an LAN in an automobile.
FIG. 8 is a block diagram showing the configuration of each communication node. In the multi-master communication system, each communication node is composed of a CPU 14, a main RAM 15, an external I/F 16, and a CAN control block 4. The CPU 14 is connected with an internal bus. The main RAM 15 is used for storing data to be processed by the CPU 14. The external I/F 16 receives information from a sensor 3 provided outside the communication node 1. The CAN control block 4 controls communications.
The CAN control block 4 is composed of a shift register 13, a message buffer 12, and a CAN controller 11. The shift register 13 converts serial data transferred on the CAN bus 2 into parallel data. The message buffer 12 has a transmission buffer and a reception buffer for storing transmission/reception data. The CAN controller 11 controls data exchange between the message buffer 12 and the shift register 13.
Further, as shown in FIG. 9, the CAN controller 11 is composed of a transmission temporary buffer 112, and a control circuit. The transmission temporary buffer 112 receives a frame (ID, DLC, and data) from the message buffer 12 and supplies the data to the shift register 13. The control circuit receives transmission data and reception data, supplies a clock and a signal to the shift register 13, and outputs a transmission enable signal.
In the communication system thus configured, the upper limit to an amount of data that can be transferred on the bus (unit traffic) in one step is determined based on the protocol. When transmitting a large amount of data, the communication node divides the data into plural pieces by unit traffic to sequentially send plural frames including the divided data to the bus. In this way, it is possible to transmit the data beyond a predetermined amount (unit traffic). For this operation, in the above multi-master communication system, a communication state of the bus should be checked each time the frames are sent.
In a communication system capable of transmitting 8-byte data at a time, for example, 16-byte data is transmitted in two steps. More specifically, the bus communication state is checked for both of the first transmission of 8-byte data and the second transmission of 8-byte data. In other words, the bus communication state should be checked twice. As such a communication system, ones disclosed in Japanese Unexamined Patent Publication Nos. 9-6721 and 61-195453 have been known. Further, a bus access system as disclosed in Japanese Unexamined Patent Publication No. 3-278156 has been known.
In such a conventional communication system, data transmission from a communication node to a bus is executed in accordance with the following flow as shown in FIG. 6.
A communication node for data transmission starts a transmission flow if being ready to transmit data. First, a bus communication state is checked in step S61. If the bus is not in an idle state in step S61, the bus communication state is repeatedly checked until the bus enters an idle state. If the idle state is confirmed in step S61, the process advances to a transmission step, step S62.
In step S62, a “Start Of Frame (SOF)” that indicates the start of transmitting a frame is issued, followed by the transmission of an ID number indicating the order of priority given to a frame sent from the communication node. Then, the process advances to the next step, S63.
In step S63, it is determined whether or not an ID sent to the bus matches an ID of the output frame, and if not matched, the communication node determines that a frame having an ID that is given higher priority than its own ID is sent to the bus from another communication node. The transmission of the frame having a lower-priority ID is suspended to start the reception of the frame having a higher-priority ID. In contrast, if matched, the process advances to a data transmission step, S64.
Incidentally, although omitted from the flow, if a value different from a value sent from the target node is found except for the frame ID, error handling is executed.
In step S64, an “End of Frame (EOF)” that indicates the end of a frame is issued at the completion of data transmission to end the transmission flow.
It is assumed here that the communication node A that only can transmit 8-byte data per frame is required to transmit 16-byte data. The communication node A transmits the 16-byte data by assigning 8-byte data to each of a first frame and a second frame. The communication node A checks the bus communication state for transmitting the first frame, and then transmits the first frame (high-priority ID A and data A) as shown in FIG. 4. After transmitting the first frame, the communication node A issues the “End Of Frame (EOF)” indicating the end of the frame and then prepares for the next transmission of the subsequent second frame. The preparation for the next transmission means a transfer of an ID from a message buffer to an ID shift register with the control block to transmit the ID to the bus. Incidentally, if the message buffer already stores the next frame, that is, an ID and data, the node can make preparations for the transmission with no delay by reading the frame from the message buffer.
However, as shown in FIG. 5, the next frame is written to the message buffer by a CPU that operates not in sync with the preparation for the transmission. Thus, if the CPU executes another processing, the second frame following the first frame that has been first transmitted is transmitted to the message buffer with a delay in some cases. As a result, at an arbitration timing that appears after the elapse of an inter-frame space (IFS) from the EOF, the subsequent second frame has not yet been written to the message buffer, and a frame having a lower-priority ID is transmitted from the other communication node B ahead of the second frame.
This means that the communication node A needs to wait for the communication node B to complete communications and issue the EOF, and then waits for the bus to become idle. After that, the communication node A can transmit the subsequent second frame. Especially in the case where the communication node A has an ID that is given higher priority than the communication node B, the transmission of the second frame with the communication node A that should be first executed in principle is hindered by the transmission of a lower-priority frame from the communication node B that detects a bus idle state, resulting in a problem that a process using data in the second frame from the communication node A cannot be executed in time.